Asic Design Verification Engineer jobs in San Francisco Bay Area
There are 6 open Asic Design Verification Engineer roles in San Francisco Bay Area on Linora right now, pulled daily from company career pages across Greenhouse, Ashby, Lever, and Workday. Typical pay runs $175k to $280k.
Updated 2026-10-25. Figures come from live job postings and refresh daily.
Pay on these live postings runs about $175k to $280k, across 4 roles that list a range.
- Senior ASIC Design Verification Engineer (AI Compute)Persimmons · San Jose, CaliforniaWho we are Persimmons is building the infrastructure that will power the next decade of AI. Founded in 2023 by veteran technologists from the worlds…10 days ago
- Sr. ASIC Design Verification Engineer (Silicon Engineering)SpaceX · Palo Alto, CASpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not…$175,000 – $280,0003 months ago
- ASIC Design Verification EngineerWaymo · Mountain View, CA, USAWaymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving…$175,000 – $215,0004 months ago
- ASIC Design Verification EngineerPalo Alto Networks · Hybrid - Santa ClaraPalo Alto Networks is dedicated to protecting the digital way of life through innovative technology. As a Design Verification Engineer on the ASIC…$106K/yr - $172K/yr5 months ago
- Senior ASIC Design Verification EngineerNvidia · US, CA, Santa ClaraNVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This…5 months ago
- Senior ASIC Design Verification EngineerEthernovia, Inc. · San Jose, CAAbout Ethernovia, Inc. Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and…$200,000 – $300,00025 months ago
Common questions
How many Asic Design Verification Engineer jobs are open in San Francisco Bay Area?
There are 6 open Asic Design Verification Engineer roles in San Francisco Bay Area on Linora right now, pulled daily from company career pages across Greenhouse, Ashby, Lever, and Workday.
How much does a Asic Design Verification Engineer earn?
The median Asic Design Verification Engineer salary is $175k to $264k per year, based on 10 live postings that list a range.
How often are Asic Design Verification Engineer jobs updated?
Daily. Linora reads roles straight from company career pages and drops listings that close, so the Asic Design Verification Engineer jobs shown are current rather than reposted or expired.